命令一覧表

オリジナルはPIC24FJ64GA004 Data SheetのTABLE 25-1と25-2です。違いは以下の通り。

  • SYMBOLへのリンクがある。
  • オペコードに{.B}と{W}を追加している。
  • 並び順をdsPIC30F/33F Programmer’s Reference Manual掲載順に変更している。
  • "dsPIC30F/33F Programmer’s Reference Manual"(Revision C (February 2008))のInstruction掲載ページ番号を項目追加している。
  • その他誤記の修正。
  1. MNEMONIC LIST
  2. SYMBOLS USED IN OPCODE DESCRIPTIONS
  3. INSTRUCTION SET OVERVIEW

SYMBOLS USED IN OPCODE DESCRIPTIONS

Field Description
#text Means literal defined by "text"
(text) Means "content of text"
[text] Means "the location addressed by text"
{ } Optional field or operation
Register bit field
.B Byte mode selection
.D Double-Word mode selection
.S Shadow register select
.w Word mode selection (default)
bit4 4-bit bit selection field (used in word addressed instructions) ∈ {0...15}
C, DC, N, OV, Z MCU Status bits: Carry, Digit Carry, Negative, Overflow, Sticky Zero
Expr Absolute address, label or Expression (resolved by the linker)
f File register address ∈ {0000h...1FFFh}
lit1 1-bit unsigned literal ∈ {0,1}
lit4 4-bit unsigned literal ∈ {0...15}
lit5 5-bit unsigned literal ∈ {0...31}
lit8 8-bit unsigned literal ∈ {0...255}
lit10 10-bit unsigned literal ∈ {0...255} for Byte mode, {0:1023} for Word mode
lit14 14-bit unsigned literal ∈ {0...16384}
lit16 16-bit unsigned literal ∈ {0...65535}
lit23 23-bit unsigned literal ∈ {0...8388608}; LSB must be '0'
None Field does not require an entry, may be blank
PC Program Counter
Slit10 10-bit signed literal ∈ {-512...511}
Slit16 16-bit signed literal ∈ {-32768...32767}
Slit6 6-bit signed literal ∈ {-16...16}
Wb Base W register ∈ {W0..W15}
Wd Destination W register ∈ { Wd, [Wd], [Wd++], [Wd--], [++Wd], [--Wd] }
Wdo Destination W register ∈ { Wnd, [Wnd], [Wnd++], [Wnd--], [++Wnd], [--Wnd], [Wnd+Wb] }
Wm,Wn Dividend, Divisor working register pair (direct addressing)
Wn One of 16 working registers ∈ {W0..W15}
Wnd One of 16 destination working registers ∈ {W0..W15}
Wns One of 16 source working registers ∈ {W0..W15}
WREG W0 (working register used in file register instructions)
Ws Source W register ∈ { Ws, [Ws], [Ws++], [Ws--], [++Ws], [--Ws] }
Wso Source W register ∈ { Wns, [Wns], [Wns++], [Wns--], [++Wns], [--Wns], [Wns+Wb] }


INSTRUCTION SET OVERVIEW
AssemblyDescription# ofStatus
Flags
Affected
PDF
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Mne-
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SyntaxWo-
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ADDADD{.B} ff = f + WREG11C DC N OV Z81
ADD{.B} f,WREGWREG = f + WREG11C DC N OV Z81
ADD{.B} #lit10,WnWd = lit10 + Wd11C DC N OV Z82
ADD{.B} Wb,#lit5,WdWd = Wb + lit511C DC N OV Z83
ADD{.B} Wb,Ws,WdWd = Wb + Ws11C DC N OV Z84
ADDCADDC{.B} ff = f + WREG + (C)11C DC N OV Z88
ADDC{.B} f,WREGWREG = f + WREG + (C)11C DC N OV Z88
ADDC{.B} #lit10,WnWd = lit10 + Wd + (C)11C DC N OV Z89
ADDC{.B} Wb,#lit5,WdWd = Wb + lit5 + (C)11C DC N OV Z90
ADDC{.B} Wb,Ws,WdWd = Wb + Ws + (C)11C DC N OV Z91
ANDAND{.B} ff = f .AND. WREG11N Z93
AND{.B} f,WREGWREG = f .AND. WREG11N Z93
AND{.B} #lit10,WnWd = lit10 .AND. Wd11N Z94
AND{.B} Wb,#lit5,WdWd = Wb .AND. lit511N Z95
AND{.B} Wb,Ws,WdWd = Wb .AND. Ws11N Z96
ASRASR{.B} ff = Arithmetic Right Shift f11C N OV Z98
ASR{.B} f,WREGWREG = Arithmetic Right Shift f11C N OV Z98
ASR{.B} Ws,WdWd = Arithmetic Right Shift Ws11C N OV Z99
ASR Wb,#lit4,WndWnd = Arithmetic Right Shift Wb by lit411N Z101
ASR Wb,Wns,WndWnd = Arithmetic Right Shift Wb by Wns11N Z102
BCLRBCLR{.B} f,#bit4Bit Clear f11None103
BCLR{.B} Ws,#bit4Bit Clear Ws11None104
BRABRA ExprBranch Unconditionally12None105
BRA WnComputed Branch12None106
BRA C,ExprBranch if Carry11(2)None107
BRA GE,ExprBranch if Greater than or Equal11(2)None109
BRA GEU,ExprBranch if Unsigned Greater than or Equal11(2)None110
BRA GT,ExprBranch if Greater than11(2)None111
BRA GTU,ExprBranch if Unsigned Greater than11(2)None112
BRA LE,ExprBranch if Less than or Equal11(2)None113
BRA LEU,ExprBranch if Unsigned Less than or Equal11(2)None114
BRA LT,ExprBranch if Less than11(2)None115
BRA LTU,ExprBranch if Unsigned Less than11(2)None116
BRA N,ExprBranch if Negative11(2)None117
BRA NC,ExprBranch if Not Carry11(2)None118
BRA NN,ExprBranch if Not Negative11(2)None119
BRA NOV,ExprBranch if Not Overflow11(2)None120
BRA NZ,ExprBranch if Not Zero11(2)None121
BRA OV,ExprBranch if Overflow11(2)None124
BRA Z,ExprBranch if Zero11(2)None127
BSETBSET{.B} f,#bit4Bit Set f11None128
BSET{.B} Ws,#bit4Bit Set Ws11None129
BSWBSW.C Ws,WbWrite C bit to Ws<Wb>11None130
BSW.Z Ws,WbWrite Z bit to Ws<Wb>11None130
BTGBTG{.B} f,#bit4Bit Toggle f11None132
BTG{.B} Ws,#bit4Bit Toggle Ws11None133
BTSCBTSC{.B} f,#bit4Bit Test f, Skip if Clear11(2
or3)
None134
BTSC Ws,#bit4Bit Test Ws, Skip if Clear11(2
or3)
None136
BTSSBTSS{.B} f,#bit4Bit Test f, Skip if Set11(2
or3)
None138
BTSS Ws,#bit4Bit Test Ws, Skip if Set11(2
or3)
None139
BTSTBTST{.B} f,#bit4Bit Test f11Z141
BTST.C Ws,#bit4Bit Test Ws to C11C142
BTST.Z Ws,#bit4Bit Test Ws to Z11Z142
BTST.C Ws,WbBit Test Ws<Wb> to C11C143
BTST.Z Ws,WbBit Test Ws<Wb> to Z11Z143
BTSTSBTSTS{.B} f,#bit4Bit Test then Set f11Z145
BTSTS.C Ws,#bit4Bit Test Ws to C, then Set11C146
BTSTS.Z Ws,#bit4Bit Test Ws to Z, then Set11Z146
CALLCALL lit23Call Subroutine22None147
CALL WnCall Indirect Subroutine12None148
CLRCLR{.B} ff = 0x000011None149
CLR{.B} WREGWREG = 0x000011None149
CLR{.B} WdWd = 0x000011None150
CLRWDTCLRWDTClear Watchdog Timer11WDTO, Sleep153
COMCOM{.B} ff = ~f11N Z154
COM{.B} f,WREGWREG = ~f11N Z154
COM{.B} Ws,WdWd = ~Ws11N Z155
CPCP{.B} fCompare f with WREG11C DC N OV Z156
CP{.B} Wb,#lit5Compare Wb with lit511C DC N OV Z157
CP{.B} Wb,WsCompare Wb with Ws (Wb - Ws)11C DC N OV Z158
CP0CP0{.B} f(f) - 0x011C DC N OV Z159
CP0{.B} Ws(Ws) - 0x000011C DC N OV Z160
CPBCPB{.B} f(f) - (WREG) - (~C)11C DC N OV Z161
CPB{.B} Wb,#lit5(Wb) - lit5 - (~C)11C DC N OV Z162
CPB{.B} Wb,Ws(Wb) - (Ws) - (~C)11C DC N OV Z163
CPSEQCPSEQ{.B} Wb,Wn(Wb) - (Wn), Skip if (Wb) = (Wn)11(2
or3)
None165
CPSGTCPSGT{.B} Wb,Wn(Wb) - (Wn), Skip if (Wb) > (Wn)11(2
or3)
None166
CPSLTCPSLT{.B} Wb,Wn(Wb) - (Wn), Skip if (Wb) < (Wn)11(2
or3)
None167
CPSNECPSNE{.B} Wb,Wn(Wb) - (Wn), Skip if (Wb) ≠ (Wn)11(2
or3)
None168
DAWDAW.B WnWn = Decimal Adjust Wn11C169
DECDEC{.B} ff = f - 111C DC N OV Z170
DEC{.B} f,WREGWREG = f - 111C DC N OV Z170
DEC{.B} Ws,WdWd = Ws - 111C DC N OV Z171
DEC2DEC2{.B} ff = f - 211C DC N OV Z172
DEC2{.B} f,WREGWREG = f - 211C DC N OV Z172
DEC2{.B} Ws,WdWd = Ws - 211C DC N OV Z173
DISIDISI #lit14Disable Interrupts for k Instruction Cycles11None174
DIVDIV.S{W} Wm,WnSigned 16/16-bit Integer Divide118C N OV Z175
DIV.SD Wm,WnSigned 32/16-bit Integer Divide(m is even)118C N OV Z175
DIV.U{W} Wm,WnUnsigned 16/16-bit Integer Divide118C N OV Z177
DIV.UD Wm,WnUnsigned 32/16-bit Integer Divide(m is even)118C N OV Z177
EXCHEXCH Wns,WndSwap Wns with Wnd11None189
FF1LFF1L Ws,WndFind First One from Left (MSb) Side11C192
FF1RFF1R Ws,WndFind First One from Right (LSb) Side11C194
GOTOGOTO ExprGo to Address22None196
GOTO WnGo to Indirect12None197
INCINC{.B} ff = f + 111C DC N OV Z198
INC{.B} f,WREGWREG = f + 111C DC N OV Z198
INC{.B} Ws,WdWd = Ws + 111C DC N OV Z199
INC2INC2{.B} ff = f + 211C DC N OV Z200
INC2{.B} f,WREGWREG = f + 211C DC N OV Z200
INC2{.B} Ws,WdWd = Ws + 211C DC N OV Z201
IORIOR{.B} ff = f .IOR. WREG11N Z202
IOR{.B} f,WREGWREG = f .IOR. WREG11N Z202
IOR{.B} #lit10,WnWd = lit10 .IOR. Wd11N Z203
IOR{.B} Wb,#lit5,WdWd = Wb .IOR. lit511N Z204
IOR{.B} Wb,Ws,WdWd = Wb .IOR. Ws11N Z205
LNKLNK #lit14Link Frame Pointer11None209
LSRLSR{.B} fC = f<0>, f = f, f = 011C N OV Z210
LSR{.B} f,WREGC = f<0>, W0 = f, W0 = 011C N OV Z210
LSR{.B} Ws,WdC = Ws<0>, Wd = Ws, Wd = 011C N OV Z211
LSR Wb,#lit4,WndWnd = Logical Right Shift Wb by lit411N Z213
LSR Wb,Wns,WndWnd = Logical Right Shift Wb by Wns11N Z214
MOVMOV{.B} fMove f to f11N Z219
MOV{.B} f,WREGMove f to WREG11N Z219
MOV{.B} WREG,fMove WREG to f11N Z220
MOV f,WndMove f to Wnd11None221
MOV Wns,fMove Wns to f11None222
MOV.B #lit8,WndMove 8-bit Literal to Wnd11None223
MOV #lit16,WndMove 16-bit Literal to Wnd11None224
MOV{.B} [Wns+Slit10],WndMove [Wns+Slit10] to Wnd11None225
MOV{.B} Wns,[Wns+Slit10]Move Wns to [Wns+Slit10]11None226
MOV{.B} Wso,WdoMove Ws to Wd11None227
MOV.D Wns,WdMove Double from W(ns):W(ns+1) to Wd12None229
MOV.D Ws,WndMove Double from Ws to W(nd+1):W(nd)12None231
MULMUL.B fW2 = WREG<7:0> * f<7:0>11None243
MUL fW3:W2 = f * WREG11None243
MUL.SS Wb,Ws,Wnd{Wnd+1, Wnd} = Signed(Wb) * Signed(Ws)11None244
MUL.SU Wb,#lit5,Wnd{Wnd+1, Wnd} = Signed(Wb) * Unsigned(lit5)11None246
MUL.SU Wb,Ws,Wnd{Wnd+1, Wnd} = Signed(Wb) * Unsigned(Ws)11None248
MUL.US Wb,Ws,Wnd{Wnd+1, Wnd} = Unsigned(Wb) * Signed(Ws)11None250
MUL.UU Wb,#lit5,Wnd{Wnd+1, Wnd} = Unsigned(Wb) * Unsigned(lit5)11None252
MUL.UU Wb,Ws,Wnd{Wnd+1, Wnd} = Unsigned(Wb) * Unsigned(Ws)11None253
NEGNEG{.B} ff = ~f + 111C DC N OV Z255
NEG{.B} f,WREGWREG = ~f + 111C DC N OV Z255
NEG{.B} Ws,WdWd = Ws + 111C DC N OV Z256
NOPNOPNo Operation11None258
NOPRNo Operation11None259
POPPOP fPop f from Top-of-Stack (TOS)11None260
POP WdoPop from Top-of-Stack (TOS) to Wdo11None261
POP.D WndPop from Top-of-Stack (TOS) to W(nd):W(nd+1)12None262
POP.SPop Shadow Registers11All263
PUSHPUSH fPush f to Top-of-Stack (TOS)11None264
PUSH WsoPush Wso to Top-of-Stack (TOS)11None265
PUSH.D WnsPush W(ns):W(ns+1) to Top-of-Stack (TOS)12None266
PUSH.SPush Shadow Registers11None267
PWRSAVPWRSAV #lit1Go into Sleep or Idle mode11WDTO, Sleep268
RCALLRCALL ExprRelative Call12None269
RCALL WnComputed Call12None270
REPEATREPEAT #lit14Repeat Next Instruction lit14 + 1 times11None271
REPEAT WnRepeat Next Instruction (Wn) + 1 times11None272
RESETRESETSoftware Device Reset11None274
RETFIERETFIEReturn from Interrupt13(2)None275
RETLWRETLW #lit10,WnReturn with Literal in Wn13(2)None276
RETURNRETURNReturn from Subroutine13(2)None277
RLCRLC{.B} ff = Rotate Left through Carry f11C N Z278
RLC{.B} f,WREGWREG = Rotate Left through Carry f11C N Z278
RLC{.B} Ws,WdWd = Rotate Left through Carry Ws11C N Z279
RLNCRLNC{.B} ff = Rotate Left (No Carry) f11N Z281
RLNC{.B} f,WREGWREG = Rotate Left (No Carry) f11N Z281
RLNC{.B} Ws,WdWd = Rotate Left (No Carry) Ws11N Z282
RRCRRC{.B} ff = Rotate Right through Carry f11C N Z284
RRC{.B} f,WREGWREG = Rotate Right through Carry f11C N Z284
RRC{.B} Ws,WdWd = Rotate Right through Carry Ws11C N Z285
RRNCRRNC{.B} ff = Rotate Right (No Carry) f11N Z287
RRNC{.B} f,WREGWREG = Rotate Right (No Carry) f11N Z287
RRNC{.B} Ws,WdWd = Rotate Right (No Carry) Ws11N Z288
SESE Ws,WndWnd = Sign-Extended Ws11C N Z294
SETMSETM{.B} ff = FFFFh11None295
SETM{.B} WREGWREG = FFFFh11None295
SETM{.B} WsWs = FFFFh11None296
SLSL{.B} ff = Left Shift f11C N OV Z299
SL{.B} f,WREGWREG = Left Shift f11C N OV Z299
SL{.B} Ws,WdWd = Left Shift Ws11C N OV Z300
SL Wb,#lit4,WndWnd = Left Shift Wb by lit411N Z302
SL Wb,Wns,WndWnd = Left Shift Wb by Wns11N Z303
SUBSUB{.B} ff = f - WREG11C DC N OV Z304
SUB{.B} f,WREGWREG = f - WREG11C DC N OV Z304
SUB{.B} #lit10,WnWn = Wn - lit1011C DC N OV Z305
SUB{.B} Wb,#lit5,WdWd = Wb - lit511C DC N OV Z306
SUB{.B} Wb,Ws,WdWd = Wb - Ws11C DC N OV Z307
SUBBSUBB{.B} ff = f - WREG - (~C)11C DC N OV Z310
SUBB{.B} f,WREGWREG = f - WREG - (~C)11C DC N OV Z310
SUBB{.B} #lit10,WnWn = Wn - lit10 - (~C)11C DC N OV Z311
SUBB{.B} Wb,#lit5,WdWd = Wb - lit5 - (~C)11C DC N OV Z312
SUBB{.B} Wb,Ws,WdWd = Wb - Ws - (~C)11C DC N OV Z313
SUBBRSUBBR{.B} ff = WREG - f - (~C)11C DC N OV Z315
SUBBR{.B} f,WREGWREG = WREG - f - (~C)11C DC N OV Z315
SUBBR{.B} Wb,#lit5,WdWd = lit5 - Wb - (~C)11C DC N OV Z316
SUBBR{.B} Wb,Ws,WdWd = Ws - Wb - (~C)11C DC N OV Z317
SUBRSUBR{.B} ff = WREG - f11C DC N OV Z319
SUBR{.B} f,WREGWREG = WREG - f11C DC N OV Z319
SUBR{.B} Wb,#lit5,WdWd = lit5 - Wb11C DC N OV Z320
SUBR{.B} Wb,Ws,WdWd = Ws - Wb11C DC N OV Z321
SWAPSWAP.B WnWn = Nibble Swap Wn11None323
SWAP WnWn = Byte Swap Wn11None323
TBLRDHTBLRDH{.B} Ws,WdRead Prog<23:16> to Wd<7:0>12None324
TBLRDLTBLRDL{.B} Ws,WdRead Prog<15:0> to Wd12None326
TBLWTHTBLWTH{.B} Ws,WdWrite Ws<7:0> to Prog<23:16>12None328
TBLWTLTBLWTL{.B} Ws,WdWrite Ws to Prog<15:0>12None330
ULNKULNKUnlink Frame Pointer11None332
XORXOR{.B} ff = f .XOR. WREG11N Z333
XOR{.B} f,WREGWREG = f .XOR. WREG11N Z333
XOR{.B} #lit10,WnWd = lit10 .XOR. Wd11N Z334
XOR{.B} Wb,#lit5,WdWd = Wb .XOR. lit511N Z335
XOR{.B} Wb,Ws,WdWd = Wb .XOR. Ws11N Z336
ZEZE Ws,WndWnd = Zero-Extend Ws11C N Z338